1. Field of the Invention
The present invention relates to a rectified power supply circuit and more particularly to such a circuit adapted to receive a high-value a.c. voltage or a low-value a.c. voltage, and that operates as a power factor correction circuit, at least for the high value supply voltage.
For example, the high a.c. voltage may be a voltage from the mains networks at 220-240 V and the low a.c. voltage may be a voltage from the mains networks at 100-117 V.
2. Discussion of the Related Art
FIG. 1A represents an example of a circuit providing a rectified supply voltage with power factor correction. This circuit includes a rectifying bridge BR having input terminals A and B connected to the mains voltage and output terminals X and Y connected to a storing and power factor correction circuit 100 and to a block 110. Block 110 incorporates a load associated with a regulation circuit such as a switch-mode circuit. Hereafter, block 110 will simply be called a "load".
The storing and power factor correction circuit comprises, between terminals X and Y, a capacitor C1 serially connected with a diode D1 and a capacitor C2, diode D1 being oriented so as to allow a charging of capacitors C1 and C2. A serial resistor R is generally provided for limiting current peaks during power-on and switching. Terminal Y is connected to a node 300 between capacitor C1 and diode D1 through a diode D2. Terminal X is connected to a node 310 between diode D1 and capacitor C2 through a diode D3. Diodes D2 and D3 are oriented so as to allow the discharge of capacitors C1 and C2 towards load 110. Generally, capacitors C1 and C2 have a same value. It is also known to substitute avalanche diodes for at least some of the diodes D1, D2 and D3.
FIG. 1B shows an equivalent diagram of circuit 100 when capacitors C1 and C2 are in a discharge phase. Then, both capacitors are parallel-connected, whereas in a charging phase they are serially charged.
The operation of this circuit will be explained in connection with FIG. 1C that illustrates the voltage V between terminals X and Y, the voltages VC1 and VC2 across each capacitor C1 and C2 (assumed of a same value) and the (rectified) current I drawn from the mains supply.
During the period t0&lt;t&lt;t1, capacitors C1 and C2 discharge in parallel. All the power required by load 110 is supplied by these capacitors.
At time t1, the rectified voltage Vrec equals the instantaneous voltage levels VC1, VC2 that are respectively present across capacitors C1 and C2. Diodes D2 and D3 are reverse biased. Capacitors C1 and C2 are now floating and their charge is substantially constant. Therefore, the load is directly supplied from the mains supply. This results in a rapid increase in the current drawn from the mains. During the period t1&lt;t&lt;t2, the rectified voltage increases and the current drawn from the mains supply decreases. The decrease in the current for an increase in the voltage is due to the fact that the load power requirements are assumed to be constant. During this period, diodes D1, D2 and D3 remain reverse biased and capacitors C1 and C2 remain floating.
At time t2, the rectified voltage substantially equals the voltage VC1+VC2 that is stored across capacitors C1 and C2 and diode D1 is thus forward biased. During the period t2&lt;t&lt;t3, the mains supply charges the serially connected capacitors, via diode D1, at the same time as providing power to the load. Diodes D2 and D3 remain reverse biased. Each of the capacitors is charged to Vp/2.
At time t3, the rectified voltage reaches its peak value Vp and diode D1 is again reverse biased. During the period t3&lt;t&lt;t4, the rectified voltage decreases and the current drawn from the mains supply increases if the load power requirements are constant. During this period, capacitors C1 and C2 maintain their charge, Vp/2.
At time t4, the rectified voltage reaches its half peak value Vp/2. Diodes D2 and D3 are forward biased and capacitors C1 and C2 start discharging in parallel as shown in FIG. 1B. The current drawn from the mains supply drops to zero. During the period t4&lt;t&lt;t5, the value of the rectified voltage remains less than that which is stored across each of the capacitors C1 and C2. All the power is supplied to the load by the capacitors.
Time t5 is equivalent to time t1.
An advantage of such a circuit called "power factor corrector" is that, with respect to a circuit in which the capacitor would be directly connected across the rectifying bridge BR, the time during which a current is extracted from the mains supply is increased, as shown in FIG. 1C. Therefore, the harmonics reinjected into the mains supply are reduced.
A drawback of such a circuit is that it increases the current in the load during the supply phases in which the voltage is reduced. When a switch-mode supply is used, the current in the switch is therefore increased, whereby the size of the switch must be increased. This causes an increase of the cost of the switch and of the transformer of the switch-mode power supply. However, this is necessary for improving the power factor and remains acceptable when a supply source for operating with a given mains voltage, for example 220 volts, is desired.
However, when it is desired to provide a multistandard rectifier, likely to be connected, for example as indicated above, either to a voltage of 220 volts or to a voltage of 110 volts, this drawback becomes impairing when the mains voltage is 110 volts. Indeed, in this case, if it is desired to maintain a constant power in the load, the current is doubled again. Such systems are therefore not adapted to operate with a variable voltage.